This invention relates to packaging methodologies for high-speed integrated circuits, more particularly to hermetically sealing and EMI shielding for high-speed communication devices.
Packaging technology for integrated circuits is well known, particularly relating to methods of hermetically sealing, or EMI shielding the packages. However, with very broadband integrated chips designs, the high-speed signal traces are routed to the surface, or topside of the chip, thereby creating a difficulty for hermetically sealing, or adequately EMI shielding the packages without shorting signals or affecting signal integrity. There is therefore a need to provide a hermetic environment for chip reliability, as well as shielding of electromagnetic radiation to the environment.
An apparatus and method for hermetically sealing, EMI shielding integrated circuits for high-speed electronic devices using a combination of microstrip to buried stripline interface for signal transmission from the integrated circuit. The packaging provided according to the principles of this invention comprise a first plurality of microstrips interconnecting the integrated circuit to a plurality of buried striplines exposed on a surface of the main substrate, whereby it is contemplated that these striplines may carry high-speed signals, or other electrical signals. A ceramic interposer placed over the main substrate xe2x80x9cburiesxe2x80x9d a portion of the exposed striplines on the main substrate to thereby insulate these signal paths from a hermetical seal, and EMI shielding metal lid placed over the integrated circuit. The metal lid and the seal ring brazed over the ceramic interposer thus provide both a hermetic seal and an electric radiation block. A reduction in dispersion due to the buried striplines is also achieved thereby improving jitter performance. The packaging thus provided also prevents possible radiation from the transmission lines themselves, not just radiation from the chip and bond wires.